1. Field of the Invention
This invention relates to integrated microprocessor systems and more particularly to the derivation of a local CPU style bus from a multiplexed peripheral bus.
2. Description of the Relevant Art
FIG. 1 is a block diagram of a computer system 10 including a microprocessor (CPU) 12, a CPU local bus 14 coupled to microprocessor 12, and a video controller 16 coupled to the CPU local bus 14. A bus interface unit 20 is further shown that provides an interface between the CPU local bus 14 and a multiplexed peripheral bus 22. A peripheral device 24 is coupled to the multiplexed peripheral bus 22, and in addition, a variety of other peripheral devices 26 may further be coupled to CPU local bus 14.
Microprocessor 12 is illustrative of, for example, a model 80486 microprocessor, and CPU local bus 14 is exemplary of an 80486 local bus. The CPU local bus 14 includes a set of data lines D[31:0], a set of address lines A[31:0], and a set of control lines. Details regarding the various bus cycles and protocols of the 80486 CPU local bus 14 are described in a host of publications of the known prior art.
Video controller 16 is provided with computer system 10 for controlling the display of various information on a monitor (not shown). A variety of specific video controllers exemplary of video controller 16 are currently available that connect to an 80486 local bus.
A variety of additional peripheral devices 26 may further be connected to CPU local bus 14. For example, a system memory controller as well as a direct memory access controller may be coupled to local bus 14.
Bus interface 20 provides a standard interface between the CPU local bus 14 and the multiplexed peripheral bus 22. As such, bus interface 20 orchestrates the transfer of data, address, and control signals between the various buses.
Multiplexed peripheral bus 22 is illustrative of, for example, a PCI standard configuration bus. Details regarding the PCI standard bus are provided within the publication entitled "PCI Local Bus Specification"; PCI Special Interest Group; Hillsboro, Oreg.
The microprocessor 12, the video controller 16, the bus interface unit 20, and the other peripheral devices 26 have traditionally been fabricated on separate integrated circuit chips. A new trend in computing systems has developed, however, that involves the incorporation of a CPU core along with a variety of peripherals fabricated on a single integrated microprocessing chip. Such an integrated microprocessing chip typically includes a microprocessor core, a CPU local bus, a bus interface unit, and a variety of peripheral devices such as, for example, a memory controller, a direct memory access controller, and an interrupt controller. Within such an integrated microprocessing system, a set of external pins that provides external access to the CPU local bus may be provided in addition to another set of external pins coupled to the internal bus interface unit that allows the connection of external devices to a multiplexed peripheral bus. However, the incorporation of one set of external pins for the CPU local bus 14 as well as another set of pins for the multiplexed peripheral bus results in a relatively high overall cost due to the large pin count of the integrated circuit chip.